Layered Unification of all the Hardware and Intelligence for Embedded Robotics

ARCO, FRET, and BOSSA are three independent projects that each solve a different layer of the robotic stack. LUTHIER is what connects them.

The integration problem is not trivial. Each layer has its own interfaces, its own validation cycle, and its own failure modes. LUTHIER owns the contracts between them: the data formats, the timing constraints, the fallback behavior when a layer fails to respond, and the end-to-end tests that verify the system behaves correctly as a whole.

┌─────────────────────────────────────────┐
│  ARCO  │  Planning · Guidance · Mapping │  Python
├─────────────────────────────────────────┤
│  FRET  │  ROS 2 · URDF · IK · Control   │  Python / ROS 2 Jazzy
├─────────────────────────────────────────┤
│  BOSSA │  Daemon · HAL · Real-time IO   │  C++20 / ARM64
└─────────────────────────────────────────┘
                                             ↕ LUTHIER integration layer

Resources

GitHub Repository. Full source code, integration tests, and deployment scripts.
Architecture overview. How the three layers connect and communicate.
Integration guide. Setup, configuration, and cross-layer interface documentation.
Project Roadmap. Staged milestones from SITL to physical prototype.

Validation Strategy

LUTHIER follows a four-level SDLC that mirrors the architecture:

Level	Scope	When
Level 1 — Functional	Full system, end-to-end behavior	Release gates
Level 2 — Integration	Cross-layer interfaces (ARCO↔FRET, FRET↔BOSSA)	PR to main
Level 3 — Module / PR	Changes within a single subproject	PR to subproject
Level 4 — Unit / Commit	Individual functions and classes	Every commit

Levels 3 and 4 are enforced inside each subproject’s own CI. LUTHIER owns Levels 1 and 2.

Running the Stack

Three deployment targets, with increasing hardware involvement:

Simulation (SITL). All layers run in software. BOSSA in mock mode, FRET in Gazebo, ARCO generating trajectories. No hardware required.

Hardware-in-the-Loop (HITL). Real Raspberry Pi target, simulated environment. Validates the communication pipeline and real-time constraints before assembly.

Physical prototype. Full stack on physical hardware, from ARCO’s planner to BOSSA’s actuator outputs.